LDMOS器件ESD保护能力的一种优化结构  

An Optimized Structure of the ESD Protection Capability of LDMOS Devices

作　　者：苏庆 苗彬彬 SU Qing;MIAO Binbin(Shanghai Huahong Grace Semiconductor Manufacturing Co.,Ltd,Shanghai 201203,China)

机构地区：[1]上海华虹宏力半导体有限公司,上海201203

出　　处：《集成电路应用》2018年第8期41-44,共4页Application of IC

基　　金：上海市经济和信息化委员会软件和集成电路产业发展专项基金(2015.150223)

摘　　要：目前,高压工艺技术已经变得越来越成熟,其应用领域也越来越广泛。但是其ESD保护技术却一直受到狭窄的设计窗口,可靠性等问题困扰。如何在现有高压工艺平台上,设计出满足要求的保护器件一直是高压工艺的难题。从开发的难易度考虑,LDMOS是被广泛采用的器件。通过对利用LDMOS的寄生特性应用于ESD保护的机理进行分析,并指出其设计的难点和原因,针对性地提出优化方法,并以实例验证。High pressure technology has become more and more mature. Its application field is also becoming more and more extensive. But its ESD protection technology has been beset by narrow design windows, reliability and so on. How to design the protective devices that meet the requirements on the existing high pressure process platform has been a difficult problem in high pressure technology. Considering the difficulty of development, LDMOS is a widely used device. The mechanism of applying LDMOS parasitism to ESD protection is analyzed. This paper points out the difficulties and causes of its design, and puts forward the optimization method accordingly, and verifies it with an example.

关 键 词：集成电路制造 高压LDMOS 静电保护 器件优化 

分 类 号：TN405[电子电信—微电子学与固体电子学] TN43