检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:肖家木 乔明[1,2] 齐钊 梁龙飞 曹厚华 XIAO Jiamu;QIAO Ming;QI Zhao;LIANG Longfei;CAO Houhua(State Key Laboratory of Electronic Thin Films and Integrated Device, UESTC, Chengdu 610054, China;Institute of Electronic and Information Engineering of UESTC in Guangdong, UESTC, Dongguan 523808, China)
机构地区:[1]电子科技大学电子薄膜与集成器件国家重点实验室,成都610054 [2]电子科技大学广东电子信息工程研究院,广东东莞523808
出 处:《电子与封装》2019年第5期45-48,共4页Electronics & Packaging
基 金:国家自然科学基金(61674027);四川省应用基础研究项目(18YYJC0482);广东省自然科学基金(2016A030311022);中央高校基本科研业务费(ZYGX2016J210)
摘 要:静电释放(ESD)是指电荷在两个电势不等的物体之间转移的物理现象,它存在于人们日常工作生活的任意环节。随着集成电路特征尺寸不断减小、集成度不断增高,芯片对ESD也变得越来越敏感。为了用尽可能小的版图面积来实现ESD防护,利用晶闸管结构(SCR)来实现集成电路的ESD防护已成为当下的研究热点。但传统SCR的维持电压和维持电流都很低,若直接将其应用于电源ESD防护则会导致严重的闩锁效应(latch-up)。基于高维持电流设计窗口,提出一种可用于15 V电路的抗闩锁SCR器件,并通过混合仿真验证了该器件的有效性。Electro-static discharge (ESD) is a physical phenomenon of charge transfer between two bodies with different potentials. It exists in any part of human's daily life and work. As the feature size of IC is decreasing and the integration is increasing, the chips are becomingmore andmore sensitive to ESD. In order to achieve the ESD protection with the possible smallest layout area, applying silicon control rectify (SCR) to achieve ESD protection of ICs has become a research hotspot. However, the holding voltage and holding current of traditional SCR are very low. If it is applied directly to ESD protection of power supply, it will lead to severe latch up effect. Based on high holding current design window, a kind of latch-up free SCR device for 15 V circuit is proposed, and the effectiveness of this device is verified bya mixed simulation.
分 类 号:TN406[电子电信—微电子学与固体电子学]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.177