用于3D集成的精细节距Cu/Sn微凸点倒装芯片互连工艺研究  

Research on Fine Pitch Cu/Sn Bump Flip⁃chip Interconnect Process for 3D Integration

作　　者：黄宏娟[1] 赵德胜[1] 龚亚飞[1] 张晓东[1] 时文华[1] 张宝顺[1] HUANG Hongjuan;ZHAO Desheng;GONG Yafei;ZHANG Xiaodong;SHI Wenhua;ZHANG Baoshun(Nano Fabrication Facility,Suzhou Institute of Nano-tech and Nano-bionics,Suzhou,Jiangsu,215123,CHN)

机构地区：[1]中国科学院苏州纳米技术与纳米仿生研究所,江苏苏州215123

出　　处：《固体电子学研究与进展》2021年第2期81-86,共6页Research & Progress of SSE

基　　金：微波毫米波单片集成和模块电路重点实验室基金资助项目(614280303040718)。

摘　　要：芯片异构集成的节距不断缩小至10μm及以下,焊料外扩、桥联成为焊料微凸点互连工艺的主要技术问题。通过对微凸点节距为8μm的Cu/Sn固液扩散键合的工艺研究,探索精细节距焊料微凸点互连工艺存在的问题,分析Cu/Sn微凸点键合界面金属间的化合物,实现了精细节距和高质量的Cu/Sn微凸点互连,获得了节距为8μm、微凸点数为1900个、总面积为3 mm×3 mm的不均匀微凸点阵列,该阵列互连对准误差小于0.5μm,含有200个微凸点菊花链结构的电学导通。The pitch of heterogeneous chip integration has been continuously reduced to 10μm and below,and solder expansion and bridging have become the main technical problems of solder mi⁃cro-bump interconnection process.In this paper,the problems existing in fine-pitch solder micro-bump interconnection process were explored in the research of Cu/Sn solid-liquid diffusion bonding process with a micro-bump pitch of 8μm,and the compounds between metals in Cu/Sn micro-bump bonding interface were analyzed,fine-pitch and high-quality Cu/Sn micro-bump interconnection was achieved.A nonuniform micro-bump array with a pitch of 8μm,1900 micro-bumps and a total area of 3 mm×3 mm is obtained.The alignment error of interconnection of the array is less than 0.5μm,and the array contains 200 micro-bumps daisy-chain structures for electrical conduction.

关 键 词：精细节距 倒装芯片 Cu/Sn互连 

分 类 号：TN305[电子电信—物理电子学]