面向SoC的SRAM读出电路加固设计  

Design of a radiation hardened read circuit of SRAM in SoC

作　　者：沈婧[1] 薛海卫[1] 陈玉蓉[1] 张猛华[1] 王蕾[1] Shen Jing;Xue Haiwei;Chen Yurong;Zhang Menghua;Wang Lei(CETC 58,Wuxi 214035,China)

机构地区：[1]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子技术应用》2021年第10期38-41,47,共5页Application of Electronic Technique

摘　　要：SRAM存储器在SoC芯片中的应用已经越来越普遍,存储单元的加固设计已成为抗辐射SoC芯片设计首要考虑的问题之一。提出了两种SRAM读出电路的加固结构,分别从读出电路结构、数据读出速度和抗单粒子翻转能力等方面进行了对比。两种读出结构的SRAM均有较好的抗单粒子能力,但相比较单模双互锁结构的SRAM,双模双互锁读出结构的SRAM读出时间更短。The application of SRAM memory in SoC is more and more common,and the design of radiation hardened memory has become one of the most important issues in the design of radiation resistant SoC.In this paper,two kinds of SRAM read circuits are proposed and compared in terms of readout circuit structure,data readout speed and single event upset resistance.The SRAM of the two readout structures have good single event resistance,but SRAM with dual-input DICE structure has shorter readout time compared with SRAM with single-input DICE structure.

关 键 词：SOC 单粒子翻转 SRAM读出电路 数据读出速度 

分 类 号：TN702[电子电信—电路与系统]