基于硅基扇出(eSiFO^(®))技术的先进指纹传感器晶圆级封装工艺开发  被引量:3

Development of Wafer Level Packaging Process of Advanced Fingerprint Sensors Based on Embedded Silicon Fan-Out(eSiFO^(®))Technology

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作  者:申九林 马书英 郑凤霞 王姣 魏浩 SHEN Jiulin;MA Shuying;ZHENG Fengxia;WANG Jiao;WEI Hao(Wuhan National Laboratory for Optoelectronics,HuazhongUniversity of Science and Technology,Wuhan 430074,China;Huatian Technology(Kunshan)Electronics Co.,Ltd.,Kunshan 215300,China)

机构地区:[1]华中科技大学武汉光电国家研究中心,武汉430074 [2]华天科技(昆山)电子有限公司,江苏昆山215300

出  处:《电子与封装》2023年第3期103-113,共11页Electronics & Packaging

摘  要:传统的晶圆级芯片封装(WLCSP)是一种标准的扇入式封装结构。随着I/O数的增加,无法为重布线层(RDL)提供足够的区域。近年来,在芯片周围形成扇出区域的嵌入式封装技术发展起来,其具有I/O数目高、成本低、集成灵活、体积小等优点。晶圆扇出型封装(FOWLP)通常采用环氧塑封复合料(EMC),其面临翘曲、各层热膨胀系数(CTE)不匹配、成本高昂等难题。报道了一种全新的晶圆级嵌入式硅基扇出技术,名为eSiFO^(®),其用于实现电容式指纹传感器封装。在这个创新的集成器件中,一个5.6 mm×1.0 mm的ASIC芯片被减薄到90μm,然后嵌入到硅基槽中重建一个新的晶圆。在整个工艺过程中,金属的覆盖面积达80%以上,但晶圆的翘曲小于2 mm。整个晶圆级封装工艺使用了10个掩模版,其产品良率达到98%。该产品通过了包括预处理测试、温度循环(TCT)测试、高加速温湿度应力试验(u-HAST)和高温贮存试验(HTST)在内的标准可靠性测试。The conventional wafer level chip scale package(WLCSP)is a standard fan-in package structure.With the increase of the number of I/O,it cannot provide enough space for the placement of redistribution layer(RDL).In recent years,the embedded packaging technology of fan-out area around chip has been developed,which has the advantages of high I/O number,low cost,flexible integration,and small package size.Fan-out wafer-level packaging(FOWLP)uses epoxy molding compound(EMC),which faces many problems such as wafer warpage,coefficient of thermal expansion(CTE)mismatch between different materials in each layer and high cost.Abrand-newwafer-level embedded silicon fan-out(eSiFO^(®))package technology is reported,and it is applied to the package of capacitive fingerprint sensor chips.In this innovative integrated device packaging process,the ASIC chip of 5.6 mm×1.0 mmsize is thinned to 90μm,and then embedded into the silicon cavities to form a reconstructed wafer.During the whole process,the metal coverage area is more than 80%,but the warpage of the wafer is less than 2 mm.Ten masks are used in the entire wafer-level packaging process,and the product yield reachs 98%.The product has passed standard reliability tests including pre-con testing,temperature cycle(TCT)testing,high accelerated temperature,and humidity stress test(u-HAST)and high temperature storage test(HTST).

关 键 词:晶圆级封装 扇出 eSiFO^(®) 指纹传感器 高可靠性 

分 类 号:TN305.94[电子电信—物理电子学]

 

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