减少栅氧化层湿法刻蚀过程中侧掏的改善方法  

Analysis of Improvement Methods for Reducing Side Cutting During Wet Etching of Gate Oxide Layers

作　　者：李冰寒 卞仙 高超 LI Binghan;BIAN Xian;GAO Chao(Shanghai Huahong Grace Semiconductor Manufacturing Co.,Ltd.,Shanghai 201203,China)

机构地区：[1]上海华虹宏力半导体制造有限公司,上海201203

出　　处：《集成电路应用》2023年第4期44-47,共4页Application of IC

摘　　要：阐述传统CMOS双栅工艺或三栅工艺通常包含多种不同工作电压的晶体管,这些不同工作电压的晶体管采用不同厚度的栅氧化层,一般通过湿法刻蚀实现。在湿法刻蚀过程中,去除剂侧掏导致中压或高压晶体管栅氧化层偏薄的现象普遍存在。针对这一现象进行了分析,给出一系列改善措施,并对这些措施做了机理探讨和风险评估。This paper expounds that traditional CMOS dual gate or triple gate processes typically include transistors with different operating voltages,which use gate oxide layers of different thicknesses and are typically achieved through wet etching.In the wet etching process,it is common for the removal agent to cause the gate oxide layer of medium or high voltage transistors to be thin due to side cutting.An analysis was conducted on this phenomenon,providing a series of improvement measures and conducting mechanism discussions and risk assessments on these measures.

关 键 词：集成电路制造 栅氧化层 湿法刻蚀 侧掏 黏附性 

分 类 号：TN405[电子电信—微电子学与固体电子学]