COB封装中芯片在基板不同位置的残余应力  

Residual stress of different substrate site on in COB packages

作　　者：孙志国[1] 黄卫东[1] 蒋玉齐[1] 罗乐[1] 

机构地区：[1]中国科学院上海微系统与信息技术研究所,上海200050

出　　处：《功能材料与器件学报》2002年第4期402-406,共5页Journal of Functional Materials and Devices

基　　金：国家科技部973资助项目G1999033108

摘　　要：利用硅压阻力学芯片传感器作为原位监测的载体,研究了直接粘贴芯片的封装方式中,芯片在基板上的不同位置对于封装后残余应力的影响以及在热处理过程中残余应力的变化,发现粘贴在基板靠近边的位置和中心位置时应力水平接近,但是靠近基板一角的位置应力较大,而且在热处理过程中应力出现“突跳”和“尖点”。Silicon piezoresistive sensor was applied here to in-situ record th e curing stress profile , the distributions of the residual stress and the stress evolution profile duri ng thermal treatment. It is found that when the chip is attached at the center or near one edge of the bas e board, the residualstress is relatively low; when the chip is attached near a corner of the base board, the residua stress is relatively high. Moreover, during the thermal treatments dramatic shocks an d stress peaks are recorded when the chip is attached near the corner of the base board.

关 键 词：COB封装 芯片 基板 硅压阻传感器 残余应力 位置 失效 

分 类 号：TP212[自动化与计算机技术—检测技术与自动化装置] TN305.[自动化与计算机技术—控制科学与工程]