应变Si_(1-x)Ge_x沟道PMOSFET空穴局域化研究  

Study of Hole Confinement in Strained SiGe PMOSFETs

作　　者：杨荣[1] 罗晋生[1] 屠荆[1] 

机构地区：[1]西安交通大学微电子研究所,西安710049

出　　处：《固体电子学研究与进展》2004年第1期4-9,共6页Research & Progress of SSE

摘　　要：为充分利用应变 Si Ge材料相对于 Si较高的空穴迁移率 ,研究了 Si/Si Ge/Si PMOSFET中垂直结构和参数同沟道开启及空穴分布之间的依赖关系。在理论分析的基础上 ,以数值模拟为手段 ,研究了栅氧化层厚度、Si帽层厚度、Si Ge层 Ge组分及厚度、缓冲层厚度及衬底掺杂浓度对阈值电压、交越电压和空穴分布的影响与作用 ,特别强调了 δ掺杂的意义。模拟和分析表明 ,栅氧化层厚度、Si帽层厚度、Si Ge层 Ge组分、衬底掺杂浓度及 δ掺杂剂量是决定空穴分布的主要因素 ,而 Si Ge层厚度、缓冲层厚度和隔离层厚度对空穴分布并不敏感。最后总结了沟道反型及空穴分布随垂直结构及参数变化的一般规律 ,为优化器件设计提供了参考。In order to fully exploit higher hole mobility of strained SiGe compared with that of Si, we investigate how the onset of channels and hole distribution depend on the vertical structure in Si/SiGe/Si PMOSFETs. On the basis of theoretical analysis, it is analyzed that how the device characteristics, which contain threshold voltages, crossover voltage and hole sheet densities, are determined or effected by the vertical structure parameters, including the thickness of gate oxide, Si cap layer, SiGe layer and Si buffer layer, Ge mole composition as well as substrate doping concentration. Then δ doping is emphasized particularly. Simulation and analysis show that the thickness of gate oxide and Si cap layer, Ge mole composition, substrate doping concentration as well as δ doping dose are the main parameters which determine the hole distribution, while the thickness of SiGe layer, buffer layer and spacer layer are not sensitive to it. Finally, conventional principles of vertical structure's effects on the onset of channels and hole distribution in strained SiGe PMOSFETs are summarized, which will contribute to optimal designing of devices.

关 键 词：PMOSFET 空穴局域化 Δ掺杂 栅氧化层 Si帽层 SiGe层 缓冲层 

分 类 号：TN432[电子电信—微电子学与固体电子学]