It is difficult for the existing Automated External Defibrillator (AED) on-board microprocessors to accurately classify electrocardiographic signals (ECGs) mixed with Cardiopulmonary Resuscitation artifacts in real-ti...
This project has received funding by the NSTIP Strategic Technologies program under Grant Number 14-415 ELE1448-10,King Abdul Aziz City of Science and Technology of the Kingdom of Saudi Arabia.
We have proposed a flexible coprocessor key-authentication architecture for 80/112-bit security-related applications over GF(2m)field by employing Elliptic-curve Diffie Hellman(ECDH)protocol.Towards flexibility,a seri...
In the cloud computing environment,with the complex network environment,the virtualization platform faces many security problems.At the same time,trusted computing can greatly enhance the architecture security of virt...
supported by National Natural Science Foundation of China(No.61402546)
This research focuses on the methods to improve the throughput and lower the power for low cost RSA coprocessors. We proposed the following optimized methods: 1. A fast half-carry-save Montgomery modular multiplicatio...
The paper describes an efficient direct method to solve an equation Ax = b, where A is a sparse matrix, on the Intel®Xeon PhiTM coprocessor. The main challenge for such a system is how to engage all available thre...
supported by the National Natural Science Foundation of China under Grant Nos.61133005,61272136,61221062,61402441,61432018;the National High Technology Research and Development 863 Program of China under Grant No.2012AA010903;the Chinese Academy of Sciences Special Grant for Postgraduate Research,Innovation and Practice under Grant No.11000GBF01
Equipped with 512-bit wide SIMD inst d large numbers of computing cores, the emerging x86-based Intel(R) Many Integrated Core (MIC) Architecture ot only high floating-point performance, but also substantial ...
This paper provides an implementation of a novel signal processing co-processor using a Geometric Algebra technique tailored for fast and complex geometric calculations in multiple dimensions. This is the first hardwa...
This paper describes a microprogrammed architecture for an embedded coprocessor that is able to control IEEE 1149.1 to IEEE 1149.7 test infrastructures, and explains how to expand the supported test command set. The c...