PROCESSOR

作品数：218被引量：246H指数：6
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相关机构：清华大学北京航空航天大学中北大学浙江工业大学更多>>
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相关基金：国家自然科学基金国家重点基础研究发展计划国家高技术研究发展计划中国博士后科学基金更多>>
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Energy-efficient reconfigurable AI processor
《Journal of Semiconductors》2019年第5期5-5,共1页Nanjian Wu 
High computational energy-efficiency and rapid real-timeresponse are the major concerns for applications of artificial intelligencein low-power mobile and Internet of Things deviceswith limited storage capacity. Due t...
关键词：ENERGY-EFFICIENT RECONFIGURABLE AI 
Design of high performance and radiation hardened SPARC-V8 processor
《Journal of Semiconductors》2015年第11期85-87,共3页赵元富 覃辉 彭和平 于立新 
Design of a highly reliable SPARC-V8 processor for space applications requires consideration singleevent effects including single event upsets, single event transients, single event latch-up, as well as cumulative eff...
关键词：PROCESSOR radiation hardening fault-tolerant architecture radiation effects 
A sub-milliwatt audio-processing platform for digital hearing aids
《Journal of Semiconductors》2014年第7期160-164,共5页袁甲 陈黎明 于增辉 黑勇 
supported by the Advanced Research Program of the Chinese Academy of Sciences(No.XDA06020401);the National Natural Science Foundation of China(No.61306039)
We present a novel audio-processing platform, FlexEngine, which is composed of a 24-bit applicationspecific instruction-set processor （ASIP） and five dedicated accelerators. Acceleration instructions, compact instru...
关键词：application-specific instruction-set processor （ASIP） ACCELERATOR low power hearing aids 
Design of an ultra-low-power digital processor for passive UHF RFID tags被引量：3
《Journal of Semiconductors》2009年第4期86-89,共4页施旺根 庄奕琪 李小明 王向华 靳钊 王丹 
A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods...
关键词：UHF RFID ultra-low power power management TRNG 
An Asynchronous Implementation of Add-Compare-Select Processor for Communication Systems
《Journal of Semiconductors》2005年第5期886-892,共7页赵冰 仇玉林 吕铁良 黑勇 
国家自然科学基金资助项目(批准号:60076017,90307004)~~
A novel asynchronous ACS(add-compare-select) processor for Viterbi decoder is described.It is controlled by local handshake signals instead of the globe clock.The circuits of asynchronous adder unit,asynchronous compa...
关键词：asynchronous circuits Viterbi decoder ACS response time 
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