LOW_POWER

作品数:301被引量:244H指数:5
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相关作者:闵昊闫娜王志华王志功王照钢更多>>
相关机构:清华大学复旦大学东南大学北京大学更多>>
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A low power quadrature up-conversion mixer for WSN application
《High Technology Letters》2013年第3期228-232,共5页吴晨健 Li Zhiqun 
Supported by the National High Technology Research and Development Program(No.2007AA01Z2A7);the Special Fund of Jiangsu Province for the Transformation of Scientific and Technological Achievements(No.BA2010073)
This paper presents an up-conversion mixer for 2.4GHz wireless sensor networks in 0. 181xm RF complementary metal-oxide semiconductor (CMOS) technology. It is based on a double-balanced Gilbert cell type. With two G...
关键词:MIXER low power Gilbert operational amplifier 
An architecture and algorithm for green router IP lookup
《High Technology Letters》2013年第1期63-69,共7页袁博 Wang Binqiang 
Supported by the National High Technology Research and Development Programme of China(No.2008AA01A323,2009AA01A334);the National Basic Research Program of China(No.2007CB307102)
Today,backbone networks deploy a large number of devices and links.This is mainly due to both redundancy purposes for network service reliability,and resource over-dimensioning for maintaining quality of service durin...
关键词:routing lookup low power green router dynamic mapping 
Low power and high speed explicit-pulsed double-edge triggered level converting flip-flop
《High Technology Letters》2010年第2期204-209,共6页戴燕云 Shen Jizhong 
Supported by the National Natural Science Foundation of China (No.60503027) Acknowledgements: The authors are grateful to Prof. Zhao PeiYi of Chapman University, Orange, USA, for beneficial discussions.
Variable supply voltage-clustered voltage scaling (VS-CVS) scheme can be very effective in reducing power consumption of CMOS circuits without degrading system performance. Level converting flip-flops (LCFFs) are ...
关键词:level converter FLIP-FLOP low power variable supply voltage 
Design and implementation of a DSP with multi-level low power strategies for cochlear implants
《High Technology Letters》2009年第2期141-146,共6页麦宋平 Zhang Chun Chao Jun Wang Zhihua 
Supported by the National Natural Science Foundation of China (No. 60475018)
This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimizati...
关键词:digital signal processor (DSP) cochlear implant (CI) low power algorithm optimization operand isolation clock gating memory partitioning 
A Low Power/Area Digital FIR Filter Design Based on PRF Framework
《High Technology Letters》2002年第3期57-61,共5页王栋 Wang Wei Xu Xiaoming 
SponsoredbyHDTVProjectofStateDevelopmentPlanningCommissionP .R .China
A novel DSP to ASIC (Application Specific Integrated Circuit) architecture design methodology is presented in this paper for reducing power/area consumption. Traditional methods always focus on optimizing hardware str...
关键词:ASIC architecture systolic array paralleling reducing folding power/area optimization 
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