低压大电流VDMOS器件栅电荷测量  

Gate Charge Test for Low Voltage High Current Power VDMOS

作　　者：蒋苓利[1] 罗萍[1] 蒲奎[1] 赵璐[1] 

机构地区：[1]电子科技大学,成都610054

出　　处：《实验科学与技术》2006年第B12期49-51,60,共4页Experiment Science and Technology

摘　　要：为了更直观地描述低压大电流VDMOS器件特性,对器件栅电荷特性进行了测量和提取。通过栅电荷曲线(VGS-QG),能导出器件的电容特性,驱动电流大小及能量损耗等相关参数。分析了栅电荷测试电路基本原理,提出一种可行的测试电路,PSPICE仿真和实际电路测试证明了该电路的正确性。In order to describe the characteristics of mainly focuses on VDMOS device more intuitively, this paper the gate charge test. From the gate charge curve （ VGS - QG ） obtained, such as the capacitances of the device, drive current requirements, so on. This paper introduces a feasible test circuit, cal circuit. , many parameters can be the power dissipation and which is proved valid by simulation and test in practical circuit.

关 键 词：栅电荷 栅电容 VDMOS器件 测试电路 

分 类 号：TN345[电子电信—物理电子学]