自对准外延CoSi_2源漏接触CMOS器件技术  

Self-Aligned Epitaxial CoSi_2 Contact on Source and Drain Regions for CMOS Device Technology

作　　者：邵凯[1] 李炳宗[1] 邹斯洵[1] 黄维宁[1] 吴卫军[1] 房华 於伟峰[1] 姜国宝[1] 俞波[1] 张敏[1] 

机构地区：[1]复旦大学电子工程系,中国科学院上海冶金研究所,深圳市思特达显示技术工程有限公司

出　　处：《Journal of Semiconductors》1996年第4期294-299,共6页半导体学报（英文版）

摘　　要：ＣＯ／Ｔｉ／Ｓｉ或ＴｉＮ／Ｃｏ／Ｔｉ／Ｓｉ多层薄膜结构通过多步退火技术在Ｓｉ单晶衬底上外延生长ＣｏＳｉ２薄膜，ＡＥＳ、ＲＢＳ测试显示ＣｏＳｉ２薄膜具有良好均匀性和单晶性．这种硅化物新技术已用于ＣＭＯＳ器件工艺．采用等离子体增强化学汽相淀积（ＰＥＣＶＤ）技术淀积氮氧化硅薄膜，并用反应离子刻蚀（ＲＩＥ）技术形成多晶硅栅边墙．固相外延ＣｏＳｉ２薄膜技术和边墙工艺相结合，经过选择腐蚀，可以分别在源漏区和栅区形成单晶ＣｏＳｉ２和多晶ＣｏＳｉ２薄膜，构成新型自对准硅化物（ＳＡＬＩＣＩＤＥ）器件结构．在Ｎ阱ＣＭＯＳ工艺中应用这种新型ＳＡＬＩＣＩＤＥ器件结构。提高了ＭＯＳ晶体管和试验电路的性能．Abstract Epitaxial CoSt, film can be grown on Si monocrystalline substrate by multi-step annealing of Co/Ti/Si or TiN/Co/Ti/Si multilayer. AES and RBS measurements show that epitaxially grown CoSi2 film has good uniformity with a flat CoSi2/Si interface. The new silicide technology has been studied for CMOS process application. Plasma Enhanced Chemical Vapour Deposition (PECVD) and Reactive Ion Etching (RIE) were used to form a sidewall spacer at poly-Si gate.Combining solid state epitaxial CoSi2, technique with sidewall process and selective etching,a new Self-Aligned Silicide (SALICIDE) device structure is formed. The epitaxial CoSi2 contacts are grown on source/drain region, while on top of poly-Si a polycrystalline CoSi2 layer is formed. The epitaxial SALICIDE technology has applied to N-well CMOS process and results in good MOSFET and test circuit performances.

关 键 词：CMOS器件 外延生长 COSI2 

分 类 号：TN386.1[电子电信—物理电子学]