浮栅结构SOILDMOS器件的模拟研究  

Simulation Study on SOI LDMOS Devices with Floating Gates

作　　者：葛梅[1] 王颖[1] 

机构地区：[1]哈尔滨工程大学信息与通信工程学院,哈尔滨150001

出　　处：《半导体技术》2011年第2期108-111,123,共5页Semiconductor Technology

基　　金：国家自然科学资金资助项目(60906048);黑龙江省自然科学资金资助项目(QC2009C66)

摘　　要：研究了一种具有浮栅结构的SOI LDMOS(FGSOI LDMOS)器件模型,并分析了该结构的耐压机理,通过Silvaco TCAD软件对该结构进行仿真优化。通过仿真验证可知,该结构通过类场板的结终端技术可以调节器件的横向电场,从而得到比普通SOI LDMOS器件更高的耐压并且降低了器件的比导通电阻。仿真结果表明,该结构与普通SOI LDMOS器件结构在相同的尺寸条件下耐压提高了41%,比导通电阻降低了21.9%。An SOI LDMOS device structure with floating gates（FG）was investigated and its breakdown mechanism was analyzed.This structure was proved by Silvaco TCAD software.The simulation results show that the lateral electric field of the device is modulated by the technology of the field plate,the breakdown voltage is increased and the specific on-resistance of the device is decreased.Compared with the normal SOI LDMOS device,the breakdown voltage is increased by 41%,the specific on-resistance of the FG SOI LDMOS is decreased by 21.9%.

关 键 词：SOI结构 浮栅结构 电场调制 比导通电阻 击穿电压 

分 类 号：TN386.1[电子电信—物理电子学]