2~12GHz集成E/D驱动功能的数控衰减器单片  被引量:11

2-12 GHz MMIC Digital Attenuator with Integrated E/D Driver

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作  者:刘志军[1] 陈凤霞[1] 高学邦[1] 崔玉兴[1] 吴洪江[1] 

机构地区:[1]中国电子科技集团公司第十三研究所,石家庄050051

出  处:《半导体技术》2013年第4期254-258,共5页Semiconductor Technology

摘  要:在GaAs衬底上集成增强/耗尽型数字驱动器和数控衰减器,实现了数字电路与微波电路的一体化集成。数字部分采用直接耦合场效应逻辑结构实现,具有结构简单、速度快和功耗低等优点。2~12 GHz 6 bit数控衰减器,内置6位并行驱动电路,控制端减少为6个,晶体管—晶体管逻辑电路(TTL)电平控制,并行输入控制信号。电路测试结果为:插入损耗≤4.5 dB,开关时间≤15 ns,输入输出驻波比≤1.4∶1,均方根衰减误差(全态)≤0.7 dB,静态功耗为2.0 mA@-5 V,芯片尺寸为2.6 mm×1.6 mm×0.1 mm。在GaAs PHEMT衬底上实现了数字驱动和数控衰减等功能的集成,控制电平兼容应用系统电平,应用更简单,可靠性更高。A digital attenuator MMIC integrated driver was realized by enhancement/depletion (E/D) technology on GaAs substrate. The digital portion adopts a direct coupled FET logic (DCFL) structure, which had the advantages of simple structure, high speed, low power consumption. The 2 - 12 GHz 6 bit digital attenuator has built-in 6 bit transistor-transistor logic (TYL) driving circuit, and the control end is reduced to 6. The chip exhibits excellent performance, the insertion loss is less than 4. 5 dB, switch time is less than 15 ns, VSWR is less than 1.4:1, RMS attenuation error ( all states) is less than 0. 7 dB, static power consumption is 2. 0 mA@ - 5 V, the chip size is 2. 6 mm × 1.6 mm ×0. 1 mm. Integrating digital driver and attenuator on GaAs PHEMT substrate are realized, which simplifies the system application and enhances the reliability.

关 键 词:增强 耗尽型 均方根衰减误差 TTL 数控衰减器 赝配高电子迁移率晶体管 

分 类 号:TN492[电子电信—微电子学与固体电子学] TN715

 

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