一种带有极化掺杂电流阻挡层的垂直AlGaN/GaN HFET  

A Novel Vertical AlGaN/GaN HFET with Polarization-Doped Current Blocking Layer

作　　者：赵子奇[1] 杜江锋[1] 杨谟华[1] 

机构地区：[1]电子科技大学电子薄膜与集成器件国家重点实验室,成都610054

出　　处：《微电子学》2014年第5期692-695,700,共5页Microelectronics

摘　　要：针对传统垂直GaN基异质结场效应晶体管中,由于GaN电流阻挡层内p型杂质激活率低而导致的漏电问题,提出了一种使用AlGaN极化掺杂电流阻挡层的垂直GaN基异质结场效应晶体管结构。在AlGaN极化掺杂电流阻挡层中,通过Al组分渐变而产生的极化电场来提升p型杂质激活率,能更加有效地抑制截止状态下通过极化掺杂电流阻挡层的泄漏电流,从而提升器件的耐压能力。此外,极化掺杂电流阻挡层内空穴浓度的增大会降低器件导通电阻,但由于极化掺杂电流阻挡层与n-GaN缓冲层之间形成的二维电子气会阻挡耗尽层向缓冲层内的扩展,极化掺杂电流阻挡层的使用对器件导通电阻几乎没有影响。A novel vertical GaN-based heterojunction field-effect transistor （VHFET） with polarization-doped current blocking layer （PD-CBL） was proposed. The p-type dopant activation efficiency in the AIGaN PD-CBL was enhanced significantly by graded A1 composition. The leakage current through PD-CBL was effectively suppressed by the increased hole concentration and electron barrier height in the PD-CBL, which leaded to a drastically improvement of the breakdown voltage. Moreover, although the increased hole concentration in PD-CBL tended to increase the ON-state resistance, due to the suppression of the depletion region in the GaN buffer by the 2DEG formed at the PD-CBL/buffer interface, negligible negative impact on the on-state resistance was observed for the as-proposed devices.

关 键 词：ALGAN/GAN VHFET 极化掺杂电流阻挡层 击穿电压 导通电阻 

分 类 号：TN386[电子电信—物理电子学]