总剂量辐射对0.5μm部分耗尽SOI CMOS器件的影响  

The Effect of Total Dose Radiation in 0.5 μm PD SOI CMOS Device

作　　者：谢儒彬[1] 吴建伟 洪根深[1] 罗静[1] 陈海波[1] 

机构地区：[1]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子与封装》2015年第4期41-45,共5页Electronics & Packaging

摘　　要：介绍了基于SIMOX SOI晶圆的0.5μm PD SOI CMOS器件的抗总剂量辐射性能。通过CMOS晶体管的阈值电压漂移,泄漏电流和32位DSP电路静态电流随总剂量辐射从0增加到500 krad(Si)的变化来表现该工艺技术的抗电离总剂量辐射能力。对于H型(无场区边缘)NMOS晶体管,前栅阈值电压漂移小于0.1 V;对于H型PMOS晶体管,前栅阈值电压漂移小于0.15 V;未发现由辐射引起的显著漏电。32位DSP电路在500 krad(Si)范围内,静态电流小于1 m A。通过实验数据表明,在较高剂量辐射条件下,利用该工艺制造的ASIC电路拥有良好的抗总剂量辐射性能。The paper presents the total dose radiation performance of 0.5 μm PD SOI CMOS device fabricated in a full dose SIMOX technology. The radiation performance is characterized by transistor threshold voltage shifts, leakage currents, and 32 bit DSP standby currents as a function of total dose from zero up to 500 krad（Si）. The worst case threshold voltage shifts of front channels are less than 0.1 V for H-type edgeless NMOS transistor, and less than 0.15 V for H-type PMOS transistor. No significant radiation induced leakage currents are observed. Standby currents of 32 bit DSP are less than 1 mA. The results suggest that the ASIC fabricated in the technology will perform well radiation hardness at high total dose radiation.

关 键 词：注氧隔离 绝缘体上硅 辐射加固 总剂量 

分 类 号：TN306[电子电信—物理电子学]