4H-SiC肖特基势垒二极管结终端刻蚀技术研究  

Study on Junction Termination Etching Techniques for 4H-SiC Schottky Barrier Diode

作　　者：王嘉铭 钮应喜 裴紫微 赵妙[2] 杨霏 李俊杰[2] 李俊峰[2] 张静[3] 许恒宇 金智[2] 刘新宇[2] 

机构地区：[1]全球能源互联网研究院,北京市昌平区102209 [2]中国科学院微电子研究所,北京市朝阳区100029 [3]北方工业大学微电子学系,北京市石景山区100144

出　　处：《智能电网》2016年第6期550-553,共4页Smart Grid

基　　金：国家电网公司科技项目(SGRI-WD-71-14-004)~~

摘　　要：碳化硅(SiC)材料在高温、高压、大功率等器件领域有着广阔的应用前景。结终端技术(junction terminal technology,JTT)直接影响着高压SiC肖特基势垒二极管(Schottky barrier diodes,SBD)的耐压性能,而刻蚀技术又是制备结终端结构的关键技术。研究通过使用SF_6/O_2/Ar、BCl_3/Cl_2/Ar、CF_4/O_2/Ar等不同刻蚀气体体系对SiC材料进行刻蚀,经过一系列的技术优化,最终开发出硬掩蔽倾斜结合CF_4/O_2/Ar气体干法刻蚀SiC的结终端技术。该技术在改善SiC肖特基势垒二极管击穿电压方面有着积极的作用。Silicon carbide（Si C） materials are wide used in high temperature, high voltage and high power devices. Junction terminal technology directly influences the withstand voltage properties of high-voltage Si C Schottky barrier diodes, and etching technique is a key technology for making junction terminal structure. Different etching gas systems such as SF_6 / O__2 / Ar, BCl_3 / Cl_2 / Ar and CF__4 / O_2 / Ar are used to etch Si C materials. And through a series of technology optimization, junction terminal technology for dry etching of Si C was developed, in the latter part, hard tilt masking is combined with CF_4 / O_2 / Ar gases. The technology has a positive effect on the field of improving breakdown voltage for Si C Schottky barrier diode.

关 键 词：SIC 肖特基势垒二极管 结终端技术 耐压性能 

分 类 号：TN311.7[电子电信—物理电子学]