基于1200V 4H-SiC CIMOSFET结构的优化研究  

Optimization research based on structure of 1200V 4H-SiC CIMOSFET

作　　者：宋瓘 白云[2] 顾航 陈宏[2] 谭犇 杜丽霞[1] SONG Guan;BAI Yun;GU Hang;CHEN Hong;TAN Ben;DU Li-xia(School of Electronic and Information Engineering,Lanzhou Jiaotong University,Lanzhou 730070,China;High-Frequency High-Voltage Devices and Integrated Circuits R&D Center,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China)

机构地区：[1]兰州交通大学电子与信息工程学院,甘肃兰州730070 [2]中国科学院微电子研究所高频高压器件与集成研发中心,北京100029

出　　处：《电工电能新技术》2018年第10期17-21,共5页Advanced Technology of Electrical Engineering and Energy

基　　金：国家重点研发计划项目(2016YFB0100601)

摘　　要：提出了一种1200V 4H-SiC CIMOSFET优化结构。该结构在JFET区引入P型注入,以降低栅氧化层电场,提高器件的可靠性;在积累区引入N型注入,以降低器件的比导通电阻,提高器件的电流能力。通过Silvaco软件进行仿真,对器件各项参数优化,并对器件性能进行简要说明与分析,与传统1200V 4H-SiC MOSFET相比,其比导通电阻增加0.59mΩ·cm^2,V_(DS)=1200V时,栅氧化层电场强度下降1.52MV/cm。An optimized structure of 1200V 4H-SiC CIMOSFET is proposed.In this structure,a p-type implant is introduced in the middle of the JFET region for reducing the gate oxide field and enhancing the reliability of the device;an n-type implant is introduced in the accumulate region for reducing the Rsp,on and strengthening the current capability of the device.The parameters are optimized by simulation with Silvaco,and the performance of device is briefly described and analyzed.Compared with the traditional 1200V 4H-SiC MOSFET,the Rsp,on increases by 0.59mΩ·cm2 while the gate oxide field decreases by 1.52MV/cm with VDS=1200V.

关 键 词：4H-SIC MOSFET CIMOSFET 比导通电阻 栅氧化层电场 

分 类 号：TN304.24[电子电信—物理电子学]