BSIM-CMG Compact Model for IC CAD: from FinFET to Gate-All-Around FET Technology  

作　　者：Avirup Dasgupta Chenming Hu 

机构地区：[1]Department of Electrical Engineering and Computer Science,University of California,Berkeley,CA 94720,USA.

出　　处：《Journal of Microelectronic Manufacturing》2020年第4期2-11,共10页微电子制造学报（英文）

摘　　要：We discuss the BSIM-CMG compact model for SPICE simulations of any common multi-gate(CMG)device.This is an industry standard model which has been used extensively for FinFETs IC design and simulation,and has now been extended to accurately model gate-allaround FET(GAAFET).We present the core framework of BSIM-CMG and discuss the latest updates that capture various physical phenomena originating from the quantum confinement of electrons by the small cross section of the GAAFET channel.Special attention is paid to providing suitable model parameters that can be adjusted using software tools to match the model with manufactured transistors very accurately.Furthermore,the model’s speed allows the use of Monte Carlo circuit simulation to account for random device variations encountered in manufacturing.This model is the industry standard compact model for GAAFETs and will help bridge the wide divide between GAA IC manufacturing and design,starting at 3nm/2nm technologies.

关 键 词：GATE-ALL-AROUND GAAFET FINFET BSIM BSIM-CMG Compact model Quantum NANOSHEET 3D TRANSISTOR 

分 类 号：TN3[电子电信—物理电子学]