用于高压功率集成电路的高速电平位移电路设计  

Design of a High Speed Level Shift Circuit for High Voltage Power Integrated Circuit

作　　者：何宁业 孙付扬 方昊 侯丽[1,2] HE Ningye;SUN Fuyang;FANG Hao;HOU Li(School of information Engineering,Huangshan University,Huangshan Anhui 245021,China;Intelligent Microsystems Engineering Technology Research Center of Anhui Province,Huangshan University,Huangshan Anhui 245021,China)

机构地区：[1]黄山学院信息工程学院,安徽黄山245041 [2]黄山学院智能微系统安徽省工程技术研究中心,安徽黄山245041

出　　处：《兰州工业学院学报》2023年第1期80-83,共4页Journal of Lanzhou Institute of Technology

基　　金：安徽省高校自然科学研究项目(KJHS2020B07,KJ2021ZD0120);安徽省重点研究和开发计划项目(202104b11020031);智能微系统安徽省工程技术研究中心开放项目(MSZXXM2004)。

摘　　要：介绍了一种用于高压功率集成电路的高速电平位移电路,采用窄脉冲产生电路结构,提取低压控制信号的边沿信息,将其分解为2路窄脉冲信号分别驱动高压LDMOS,实现高低压侧电路区域之间信号的快速可靠传输,大幅降低了整个电平位移电路延时和运行功耗。该电路基于0.18μm 80 V BCD工艺进行仿真设计,由仿真结果可知,实现了由输入0~5V至80~85V的电平转换功能,能够满足用于GaN栅驱动芯片的高速要求。A high speed level shift circuit for high voltage power integrated circuits is introduced in this paper.The narrow pulse generation circuit structure is used to extract the edge information of the low-voltage logic control signal and decompose it into two narrow pulse signals to drive the high-voltage LDMOS respectively.The level shift circuit realizes the fast and reliable transmission of signals between the high voltage and low voltage circuit areas,and greatly reduces delay and operating power consumption of the whole level shift circuit.The level shift circuit is simulated based on 0.18μm 80 V BCD process,and the simulation results show that the level conversion function from input 0~5 V to 80~85V is realized,which can meet the high-speed requirements for GaN gate drive chips.

关 键 词：栅驱动 电平位移 LDMOS GAN 

分 类 号：TN453[电子电信—微电子学与固体电子学]