Dual pn junctions in lateral and vertical directions are formed by diffusing the p^+ on the patterned n-well in standard CMOS technology, which are inserted under the inductor in order to reduce the currents in the s...
A distributed capacitance model for monolithic inductors is developed to predict the equivalently parasitical capacitances of the inductor.The ratio of the self-resonant frequency (f SR) of the differential-driven sym...
An accurate 1.08GHz CMOS LC voltage-controlled oscillator is implemented in a 0.35μm standard 2P4M CMOS process.A new convenient method of calculating oscillator period is presented.With this period calculation tech...