VDMOS的导通电阻模型  

On-Resistance Model for VDMOS

作　　者：姜艳[1] 陈龙[1] 沈克强[1] 

机构地区：[1]东南大学MEMS教育部重点实验室,南京210096

出　　处：《电子器件》2008年第2期537-541,共5页Chinese Journal of Electron Devices

摘　　要：导通电阻是衡量VDMOS器件性能的重要参数之一,是高开关效率,低功耗VDMOS器件的主要设计指标。从VD-MOS器件物理结构出发,利用半导体基本物理方程,如泊松方程,提出了一种建立精确导通电阻模型的方法。采用弧形边界对颈区电阻进行建模;通过考察载流子运动规律,求解泊松方程,结合器件结构与边界条件建立外延层模型。该方法物理概念清晰,规避了经验参数,考虑了器件结构参数对导通电阻的影响。该模型与MEDICI模拟结果相比较有良好的一致性。On-resistance is one of important parameters for VDMOS,and it is an important index to improve on-off efficiency and reduce power waste of VDMOS. By using basic physical equation of semiconductor, such as Poisson equation, a new method to establish an exact on-resistance model based on the physical structure of VDMOS device was given. Neck block is modeled with arc boundary. By reviewing carrier moving law, solving Poisson equations, and uniting device structure and boundary conditions, epitaxy block is modeled. This method has clear physics conception, evades experience parameters, and considers the effect of structure parameters to on-resistance. The model agrees with the results simulated by MEDICI.

关 键 词：导通电阻 VDMOS 模型 MEDICI 

分 类 号：TN432[电子电信—微电子学与固体电子学]