考虑量子效应的高k栅介质SOI MOSFET特性研究  

Study of the SOI MOSFET characteristics of high-k gate dielectric with quantum effect

作　　者：曹磊[1] 刘红侠[1] 

机构地区：[1]西安电子科技大学微电子学院,宽禁带半导体材料与器件教育部重点实验室,西安710071

出　　处：《物理学报》2012年第24期470-475,共6页Acta Physica Sinica

基　　金：国家自然科学基金(批准号:61076097;60936005);教育部科技创新工程重大项目培育资金(批准号:708083);中央高校基本科研业务费专项资金(批准号:20110203110012)资助的课题~~

摘　　要：本文主要研究考虑量子效应的高k栅介质SOIMOSFET器件特性.通过数值方法自洽求解薛定谔方程和泊松方程,得到了垂直于SiO2/Si界面方向上载流子波函数及能级的分布情况,结合Young模型,在考虑短沟道效应和高k栅介质的情况下,对SOIMOSFET的阈值电压进行模拟分析.结果表明:随着纵向电场的增加,量子化效应致使反型层载流子分布偏离表面越来越严重,造成了有效栅氧化层厚度的增加和阈值电压波动.采用高k栅介质材料,可以减小阈值电压,抑制DIBL效应.较快的运算速度保证了模拟分析的效率,计算结果和ISE仿真结果的符合说明了本文的模型精度高.In the paper, we mainly investigate the SOI MOSFET characteristics of high-k gate dielectric with quantum effect. Self-consistent solutions of Schrgdinger and Poisson equation are solved in this paper to obtain carder wave function in the directiong perpendicular to the SiO2/Si interface and energy level distribution. Based on Young model, the threshold voltage and short-channel effects of SOI MOSFET with high-k gate dielectric are simulated and analyzed. The carder distribution in inversion layer deviates from the surface with the increase of longitudinal electric field, which is caused by quantum effect. It increases the thickness of effective gate oxide and fluctuation of threshold voltage. Meanwhile, high-k gate dielectric materials can reduce the threshold voltage and restrain the DIBL efficiently. The calculation results matching ISE simulation results show that the model has a high-level accuracy, and faster operation ensures the efficiency of the simulation analysis.

关 键 词：量子化效应 高K材料 SOI MOSFET 阈值电压 

分 类 号：TN386[电子电信—物理电子学]