界面陷阱对硅纳米晶粒基MOS电容的电荷存储特性的影响  

Effects of Interface Traps in Silicon-Nanocrystals-Based Memory Structures

作　　者：袁晓利[1] 施毅[1] 朱建民[1] 顾书林[1] 郑有炓[1] 

机构地区：[1]固体微结构国家重点实验室,南京大学物理系,南京210093

出　　处：《南京大学学报（自然科学版）》2001年第5期613-618,共6页Journal of Nanjing University（Natural Science）

基　　金：江苏省自然科学基金 (BK990 49);教育部博士点基金

摘　　要：利用电容 电压 (C V )测量研究了界面陷阱对于硅纳米晶粒基金属 氧化物 半导体(MOS)电容结构的电荷存储特性的影响 .研究表明硅纳米晶粒的界面陷阱与SiO2 /Si衬底界面态对电荷存储有着不同的影响作用 .长时间存储模式下的电荷存储行为主要由存储电荷从深能级陷阱直接隧穿到SiO2Metal-oxide-semiconductor (MOS) memory devices based on Si nanocrystals (Si-NCs) operating at room temperature have attracted a great interest. It is increasingly apparent that both the interface traps at tunneling SiO 2/Si-substrate and at the internal/surface of Si-NCs have strong influence on charge transfer and store characteristics. Here, we present the investigation on the effects of interface traps and defects in Si-NCs based MOS diodes. Si-NCs were self-assembled by using SiH 4 gas source on a～3-nm-thick layer of thermally grown tunneling SiO 2 on Si substrate in a low-pressure chemical vapor deposition system. The structures of Si-NCs were characterized by scanning electron microscopy (SEM), showing that the Si-NCs have an average size of 6 nm and the density of 2×10 11～4×10 11cm -2. Various interface traps and defects were introduced by thermal annealing treatments. The experiments indicated that more amounts of charges were stored in Si-Ncs with higher interface trap density. The capacitance-voltage measurement technique was used to investigate the retention characteristics of Si-NC s based MOS diodes with different interface trap densities. The charge-loss process was quite well described with logarithmic time dependence. The difference in the interface states density resulted in different charge-lose rate. The observations demonstrate that the traps and defects at the internal/surface of Si-NCs and the interface states at the SiO 2/Si-substrate each play different roles in the charge-loss process, respectively. Considering three-dimensional quantum confinement and Coulomb charge effects, furthermore, the model of direct tunneling from deep trapping centers to Si-SiO 2 interface states has been developed to successfully explain the observed logarithmic behavior in long-term charge retention.

关 键 词：硅纳米晶粒 界面陷阱 直接隧穿 C-V测量 MOS电容 电荷存储特性 二氧化硅/硅衬底界面态 

分 类 号：O474[理学—半导体物理] TB383[理学—物理]