采用深阱结构的耐压技术  

Techniques for Improving Breakdown Voltages Using Deep Trench

作　　者：易坤[1] 张波 罗小蓉[1] 李肇基[1] 

机构地区：[1]电子科技大学IC设计中心,四川成都610054

出　　处：《微电子学》2004年第2期203-206,共4页Microelectronics

基　　金：模拟集成电路国家重点实验室基金资助项目(51439080101DZ0202)

摘　　要：　讨论了基于深阱结构的提高器件击穿电压的技术。采用深阱结构的结终端技术,消除了平面工艺所产生的曲面结,从而使器件的击穿电压接近理想平行平面结的击穿电压。同时,该结终端技术还具有占用器件面积极小的优点;通过向阱中填充低介电常数的物质,深阱结构还能抑制工艺上的横向扩散,并能承受比硅材料更大的峰值电场。Techniques for improving breakdown voltages using deep trench formed by RIE are discussed, A new trench termination technique is presented, which eliminates the cylindrical and spherical junction induced in the planar process. It also has the advantage of occupying small chip area. It has been shown that by filling the trench with lower dielectric constant materials, it can restrain the horizontal diffusion and endure a peak electric field stronger than the silicon material.

关 键 词：深阱结构 击穿电压 结终端 反应离子刻蚀 峰值电场 功率三极管 横向二极管 LDMOS 

分 类 号：TN305.7[电子电信—物理电子学]