PIPELINING

作品数:23被引量:11H指数:2
导出分析报告
相关期刊:《Digital Communications and Networks》《Journal of Beijing Institute of Technology》《High Technology Letters》《International Journal of Communications, Network and System Sciences》更多>>
相关基金:国家自然科学基金中国博士后科学基金国家重点基础研究发展计划更多>>
-

检索结果分析

结果分析中...
条 记 录,以下是1-10
视图:
排序:
A pipelining task offloading strategy via delay-aware multi-agent reinforcement learning in Cybertwin-enabled 6G network
《Digital Communications and Networks》2025年第1期92-105,共14页Haiwen Niu Luhan Wang Keliang Du Zhaoming Lu Xiangming Wen Yu Liu 
funded by the National Key Research and Development Program of China under Grant 2019YFB1803301;Beijing Natural Science Foundation (L202002)。
Cybertwin-enabled 6th Generation(6G)network is envisioned to support artificial intelligence-native management to meet changing demands of 6G applications.Multi-Agent Deep Reinforcement Learning(MADRL)technologies dri...
关键词:Cybertwin Multi-Agent Deep Reinforcement Learning(MADRL) Task offloading PIPELINING Delay-aware 
DyPipe: A Holistic Approach to Accelerating Dynamic Neural Networks with Dynamic Pipelining
《Journal of Computer Science & Technology》2023年第4期899-910,共12页庄毅敏 胡杏 陈小兵 支天 
supported by the Beijing Natural Science Foundation under Grant No.JQ18013;the National Natural Science Foundation of China under Grant Nos.61925208,61732007,61732002 and 61906179;the Strategic Priority Research Program of Chinese Academy of Sciences(CAS)under Grant No.XDB32050200;the Youth Innovation Promotion Association CAS,Beijing Academy of Artificial Intelligence(BAAI)and Xplore Prize.
Dynamic neural network(NN)techniques are increasingly important because they facilitate deep learning techniques with more complex network architectures.However,existing studies,which predominantly optimize the static...
关键词:dynamic neural network(NN) deep neural network(DNN)accelerator dynamic pipelining 
A Novel Pipelining Encryption Hardware System with High Throughput and High Integration for 5G
《China Communications》2022年第6期1-10,共10页Yuntao Liu Zesheng Shen Shuo Fang Yun Wang 
supported in part by the National R&D Program for Major Research Instruments of China(Grant No:62027814);the National Natural Science Foundation of China(Grant No:62104054);the Natural Science Foundation of Heilongjiang Province(Grant No:F2018010);the Postdoctoral Science Foundation of Heilongjiang Province,China(No:LBH-Z20133);the Fundamental Research Funds for The Central Universities,China(3072021CF0806)。
This paper presents a ZUC-256 stream cipher algorithm hardware system in order to prevent the advanced security threats for 5 G wireless network.The main innovation of the hardware system is that a six-stage pipeline ...
关键词:encryption hardware system for 5G ZUC-256 stream cipher algorithm pipeline scheme throughput rate integration rate 
A Pipelining Loop Optimization Method for Dataflow Architecture被引量:2
《Journal of Computer Science & Technology》2018年第1期116-130,共15页Xu Tan Xiao-Chun Ye Xiao-Wei Shen Yuan-Chao Xu Da Wang Lunkai Zhang Wen-Ming Li Dong-Rui Fan Zhi-Min Tang 
This work was supported by the National Key Research and Development Program of China under Grant No. 2016YFB0200501, tile National Natural Science Foundation of China under Grant Nos. 61332009 and 61521092, the Open Project Program of State Key Laboratory of Mathematical Engineering and Advanced Computing under Grant No. 2016A04 and tile Beijing Municipal Science and Technology Commission under Grant No. Z15010101009, the Open Project Program of State Key Laboratory of Computer Architecture under Grant No. CARCH201503, China Scholarship Council, and Beijing Advanced hmovation Center for hnaging Technology.
With the coming of exascale supercomputing era, power efficiency has become the most important obstacle to build an exascale system. Dataflow architecture has native advantage in achieving high power efficiency for sc...
关键词:dataflow model control-flow model loop optimization exascale computing scientific application 
A New Clock Gated Flip Flop for Pipelining Architecture
《Circuits and Systems》2016年第8期1361-1368,共8页Krishnamoorthy Raja Siddhan Saravanan 
The objective of the work is to design a new clock gated based flip flop for pipelining architecture. In computing and consumer products, the major dynamic power is consumed in the system’s clock signal, typically ab...
关键词:Selective Look Ahead Clock Gating Clock Gating Clock Networks Dynamic Power Reduction 
Performance Analysis of Code OptimizationBased on TMS320C6678 Multi-core DSP
《计算机科学与技术汇刊(中英文版)》2015年第2期35-39,共5页
In the development of modern DSP, more and more use of C/C++ as a development language has become a trend. Optimizationof C/C++ program has become an important link of the DSP software development. This article de...
关键词:TMS320C6678  PROGRAM Optimization  SOFTWARE Pipelining  PARALLEL Execution. 
Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system被引量:1
《Science China(Information Sciences)》2014年第8期158-171,共14页LIU LeiBo CHEN YingJie YIN ShouYi ZHOU Li YUAN Hang WEI ShaoJun 
In this paper, a TPP (Task-based Parallelization and Pipelining) scheme is proposed to implement AVS (Audio Video coding Standard) video decoding algorithm on REMUS (REconfigurable MUltimedia Sys- tem), which is...
关键词:AVS video decoder coarse-grained reconfigurable multimedia system computation-intensive tasks parallelization and pipelining HW/SW partitioning 
Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor被引量:1
《Science China(Information Sciences)》2014年第8期208-221,共14页LIU LeiBo CHEN YingJie WANG Dong YIN ShouYi WANG Xing WANG Long LEI Hao CAO Peng WEI ShaoJun 
supported in part by China National High Technologies Research Program (Grant No.2012AA012701);Tsinghua Information S&T National Lab Creative Team Project;International S&T Cooperation Project of China (Grant No.2012DFA11170);NNSF of China (Grant No.61106022)
This paper proposes a task-based hybrid parallel and hybrid pipeline (THPHP) scheme to implement multi-standard video algorithms, including MPEG-2, H.264, and audio video coding standard (AVS), on a heterogeneous ...
关键词:multi-standard video decoder coarse-grained reconfigurable multimedia system computation-intensive tasks parallelization and pipelining HW/SW partitioning 
An adaptive pipelining scheme for H.264/AVC CABAC decoder被引量:1
《High Technology Letters》2013年第4期391-397,共7页陈杰 Ding Dandan Yu Lu 
Supported by the National Natural Science Foundation of China(No.61076021);the National Basic Research Program of China(No.2009CB320903);China Postdoctoral Science Foundation(No.2012M511364)
An adaptive pipelining scheme for H.264/AVC context-based adaptive binary arithmetic coding(CABAC) decoder for high definition(HD) applications is proposed to solve data hazard problems coming from the data dependenci...
关键词:H.264/AVC context-based adaptive binary arithmetic coding (CABAC) ADAPTIVE PIPELINE data dependency data hazard 
AN EFFICIENT 3-DIMENSIONAL DISCRETE WAVELET TRANSFORM ARCHITECTURE FOR VIDEO PROCESSING APPLICATION被引量:1
《Journal of Electronics(China)》2012年第6期534-540,共7页Ganapathi Hegde Pukhraj Vaya 
This paper presents an optimized 3-D Discrete Wavelet Transform (3-DDWT) architecture. 1-DDWT employed for the design of 3-DDWT architecture uses reduced lifting scheme approach. Further the architecture is optimized ...
关键词:3-D Discrete Wavelet Transform (3-DDWT) Lifting scheme PIPELINING Video coding Low power 
检索报告 对象比较 聚类工具 使用帮助 返回顶部