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作品数:1737被引量:3617H指数:23
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A new curvature compensation technique for CMOS voltage reference using |V_(GS)| and △V_(BE)被引量:1
《Journal of Semiconductors》2016年第5期97-103,共7页李雪民 叶茂 赵公元 张赟 赵毅强 
Project supported by the National Natural Science Foundation of China(No.61376032)
A new mixed curvature compensation technique for CMOS voltage reference is presented, which resorts to two sub-references with complementary temperature characteristics. The first sub-reference is the source-gate volt...
关键词:voltage reference sub-reference curvature compensation SUBTHRESHOLD 
A 2.5 GS/s 14-bit D/A converter with 8 to 1 MUX被引量:1
《Journal of Semiconductors》2016年第3期95-102,共8页张俊安 李广军 张瑞涛 付东兵 李皎雪 魏亚峰 阎波 刘军 李儒章 
Project supported by the National Natural Science Foundation of China(Nos.61006027,61176030);the Research Foundation of Key Laboratory of Analog Integrated Circuit(Nos.9140C0902120C09034,9140c090204130c09042);the Fundamental Research Funds for the Central Universities of China(No.ZYGX2012J003)
A 2.5 GS/s 14-bit D/A converter(DAC) with 8 to 1 MUX is presented. This 14-bit DAC uses a "5+9"segment PMOS current-steering architecture. A bias circuit which ensures the PMOS current source obtains a larger out...
关键词:PMOS current-steering D/A converter bias circuit high speed MUX dynamic element match(DEM) 
A 2 GS/s 8-bit folding and interpolating ADC in 90 nm CMOS
《Journal of Semiconductors》2014年第8期140-144,共5页贺文伟 孟桥 张翼 唐凯 
Project supported by National Basic Research Program of China(No.2010CB327400);the Natural Science Foundation of Shandong Province,China(No.ZR2013FL007)
A single-channel 2 GS/s 8-bit analog-to-digital converter in 90 nm CMOS process technology is pre- sented. It utilizes cascade folding architecture, which incorporates an additional inter-stage sample-and-hold ampli- ...
关键词:folding and interpolating SHA COMPARATOR foreground digital calibration circuit 
A 6-bit 4 GS/s pseudo-thermometer segmented CMOS DAC
《Journal of Semiconductors》2014年第6期123-127,共5页宋毅珺 李文渊 
Project supported by the National Natural Science Foundation of China(No.61271331);the Jiangsu Provincial PAPD Program
A 6-bit 4 GS/s, high-speed and power-efficient DAC for ultra-high-speed transceivers in 60 GHz band millimeter wave technology is presented. A novel pseudo-thermometer architecture is proposed to realize a good compro...
关键词:high speed DAC CMOS current-steering near-Nyquist sampling 
A 14-bit 1-GS/s DAC with a programmable interpolation filter in 65 nm CMOS被引量:1
《Journal of Semiconductors》2013年第2期78-85,共8页赵琦 李冉 邱东 易婷 Bill Yang Liu 洪志良 
Project supported by the National High Technology Research and Development Program of China(No.2009AA011605);the National Natural Science Foundation of China(No.61076027)
A programmable 14-bit 1-GS/s current-steering digital-to-analog converter is presented. It features a selectable interpolation rate (2x/4x/8x) with a programmable interpolation filter. To improve the high-frequency ...
关键词:DAC high speed high resolution PROGRAMMABLE 
Digital post-calibration of a 5-bit 1.25 GS/s flash ADC
《Journal of Semiconductors》2012年第2期122-126,共5页Yang Yang Zhao Xianli Zhong Shun’an Li Guofeng 
supported by the Microelectronics Laboratory,Department of Science and Electronics,Beijing Institute of Technology,and the Photonics Laboratory,Department of Electrical Engineering,University of California-Los Angeles
We report a high-speed flash analog to digital converter(ADC) linearization technique employing the inverse Volterra model and digital post processing.First,a 1.25 GS/s 5-bit flash ADC is designed using a 0.18μm CM...
关键词:flash ADC Volterra series digital post-calibration 
Continuous analyticⅠ-Ⅴmodel for GS DG MOSFETs including hot-carrier degradation effects被引量:4
《Journal of Semiconductors》2012年第1期41-46,共6页Toufik Bentrcia Faycal Djeffal Abdel Hamid Benhaya 
We have studied the influence of hot-carrier degradation effects on the drain current of a gate-stack double-gate (GS DG) MOSFET device. Our analysis is carried out by using an accurate continuous current-voltage (...
关键词:GS DG MOSFET hot-carriers degradation effects compact modeling piece-wise models 
A sub-sampling 4-bit 1.056-GS/s flash ADC with a novel track and hold amplifier for an IR-UWB receiver
《Journal of Semiconductors》2011年第7期62-69,共8页赵裔 王申杰 秦亚杰 洪志良 
Project supported by the National High Technology Research and Development Program of China(No.2009AA01Z261);the State Key Laboratory of Wireless Telecommunication,Southeast University
A sub-sampling 4-bit 1.056-GS/s flash ADC with a novel track and hold amplifier(THA) in 0.13μm CMOS for an impulse radio ultra-wideband(IR-UWB) receiver is presented.The challenge is in implementing a sub-samplin...
关键词:flash ADC sub-sampling track and hold amplifier resistive averaging technique COMPARATOR IR-UWB 
A 2-GS/s 6-bit self-calibrated flash ADC被引量:1
《Journal of Semiconductors》2010年第9期129-133,共5页张有涛 李晓鹏 张敏 刘奡 陈辰 
A single channel 2-GS/s 6-bit ADC with cascade resistive averaging and self foreground calibration is demonstrated in 0.18-μm CMOS.The calibration method based on DAC trimming improves the linearity and dynamic perfo...
关键词:analog-to-digital conversion offset averaging FLASH INTERPOLATION CALIBRATION 
A CMOS Voltage Reference Based on V_(GS) and ΔV_(GS) in the Weak Inversion Region被引量:1
《Journal of Semiconductors》2008年第8期1523-1528,共6页夏晓娟 谢亮 孙伟锋 
A CMOS voltage reference, which is based on VGs and/x ΔGS in the weak inversion region, has been designed and implemented in standard 0.6μm CMOS technology. No diodes and parasitic bipolar junction transistors (BJT...
关键词:CMOS voltage reference CTAT current PTAT current temperature coefficient weak inversion region 
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