supported by the Beijing Municipal Science & Technology Development Program(No.D0305003040111);the National Natural Science Foundation of China (No. 90407006)
A triple-mode fractional-N frequency synthesizer with a noise-filter voltage controlled oscillator(VCO) for WCDMA/Bluetooth/ZigBee applications has been implemented in 0.18-μm RF-CMOS technology.The proposed synthe...
A 13bit,pipelined analog-to-digital converter (ADC) designed to achieve high linearity is described. The high linearity is realized by using the passive capacitor error-averaging technique to calibrate the capacitor...
We report a low power ASK IF receiver for short-range wireless systems,which includes an AGC loop that compensates the channel attenuation and an ASK detector. A novel current-limited transconductor and feed-forward d...
A CMOS fully-differential 2.4GHz ∑-△ frequency synthesizer for Gaussian minimum shift keying (GMSK)modulation is presented. A pre-compensation fractional-N phase-locked loop(PLL)is adopted in the modulator.The t...
An automatic IQ phase calibration method implemented in a 2.4GHz direct conversion receiver is proposed. It uses a delay locked loop (DLL) with a proposed quadrature phase detector to greatly reduce the phase error....
A 2GHz differentially tuned CMOS monolithic LC-VCO is designed and fabricated in a 0.18μm CMOS process. The VCO has a 16.15% tuning range (from 1. 8998 to 2. 2335GHz) through a combination of analog and digital tun...