国家自然科学基金(61322405)

作品数:13被引量:14H指数:2
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相关作者:叶谦曹超马瑞朱樟明梁宇华更多>>
相关机构:西安电子科技大学更多>>
相关期刊:《Chinese Physics B》《Journal of Semiconductors》《西安电子科技大学学报》更多>>
相关主题:SAR_ADCNMLINEARLOAD_BALANCINGROUTER更多>>
相关领域:电子电信电气工程更多>>
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A 0.02% THD and 80 dB PSRR filterless class D amplifier with direct lithium battery hookup in mobile application被引量:2
《Journal of Semiconductors》2017年第7期56-63,共8页Hao Zheng Zhangming Zhu Rui Ma 
supported by the National Natural Science Foundation of China(Nos.61234002,61322405,61306044)
This paper presents a fully integrated CMOS filterless class D amplifier that can directly hook up lithium battery in mobile application The proposed amplifier embodies a 2-order feedback path architecture instead of ...
关键词:class D amplifier filterless THD feedback loop PWM 
A low overhead load balancing router for network-on-chip
《Journal of Semiconductors》2016年第11期87-93,共7页周小锋 刘露 朱樟明 周端 
Project supported by the National Natural Science Foundation of China(Nos.61474087,61322405,61376039)
The design of a router in a network-on-chip (NoC) system has an important impact on some perfor- mance criteria. In this paper, we propose a low overhead load balancing router (LOLBR) for 2D mesh NoC to enhance ro...
关键词:NOC low overhead load balancing ROUTER 
A load balancing bufferless deflection router for network-on-chip
《Journal of Semiconductors》2016年第7期104-111,共8页周小锋 朱樟明 周端 
Project supported by the National Natural Science Foundation of China(Nos.61474087,61322405,61376039)
The bufferless router emerges as an interesting option for cost-efficient in network-on-chip (NoC) de- sign. However, the bufferless router only works well under low network load because deflection more easily occur...
关键词:NOC load balancing deflection router 
A 10 b 50 MS/s two-stage pipelined SAR ADC in 180 nm CMOS被引量:1
《Journal of Semiconductors》2016年第6期136-140,共5页沈易 刘术彬 朱樟明 
supported by the National Natural Science Foundation of China(Nos.61234002,61322405,61306044,61376033);the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory(No.ZHD201302)
A 10-bit 50 MS/s pipelined SAR ADC is presented which pipelines a 5-bit SAR-based MDAC with a 6-bit SAR ADC.The 1-bit redundancy relaxes the requirement for the sub-ADC decision in accuracy.The SAR-based and "half-g...
关键词:ADC pipeline SAR MDAC 
A 14-bit 40-MHz analog front end for CCD application
《Journal of Semiconductors》2016年第6期141-151,共11页王静宇 朱樟明 刘术彬 
supported by the National Natural Science Foundation of China (Nos. 61234002, 61322405, 61306044, 61376033);the National High-Tech Program of China (No. 2013AA014103);the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory (No. ZHD201302)
A 14-bit,40-MHz analog front end(AFE) for CCD scanners is analyzed and designed.The proposed system incorporates a digitally controlled wideband variable gain amplifier(VGA) with nearly 42 dB gain range,a correlat...
关键词:analog front end correlated double sampler variable gain amplifier ADC programmable clock 
A 0.1–1.5 GHz, low jitter, area efficient PLL in 55-nm CMOS process被引量:1
《Journal of Semiconductors》2016年第5期90-96,共7页钟波 朱樟明 
Project supported by the National Natural Science Foundation of China(Nos.61234002,61322405,61306044,61376033);the National High-Tech Program of China(No.2013AA014103)
A 0.1-1.5 GHz, 3.07 pS root mean squares (RMS)jitter, area efficient phase locked loop (PLL) with multiphase clock outputs is presented in this paper. The size of capacitor in the low pass filter (LPF) is signif...
关键词:phase lock loop freqency synthesizer dual path charge pump CMOS 
An ultra-low-voltage rectifier for PE energy harvesting applications被引量:2
《Journal of Semiconductors》2016年第2期126-130,共5页王静敏 杨正 朱樟明 杨银堂 
supported by the National Natural Science Foundation of China(Nos.61234002,61322405,61306044,61376033);the National High-Tech Program of China(No.2013AA014103)
An ultra low voltage rectifier with high power conversion efficiency (PCE) for PE energy harvesting ap- plications is presented in this paper. This is achieved by utilizing the DTMOS which the body terminal is conne...
关键词:PE energy harvesting DTMOS input powered active rectifier 
高精度SARADC非理想因素分析及校准方法被引量:3
《西安电子科技大学学报》2015年第6期61-65,87,共6页曹超 马瑞 朱樟明 梁宇华 叶谦 
国家自然科学基金资助项目(61234002,61322405,61306044,61376033)
对高精度逐次逼近型模数转换器的非理想因素进行理论推导和建模分析,表明模数转换器精度主要受电容失配和低位电容阵列及耦合电容的寄生电容影响,而高位寄生电容的影响可以忽略.建立了16位逐次逼近型模数转换器的高层次模型,验证了理论...
关键词:高精度模数转换器 逐次逼近型模数转换器 电容失配 数字校准 高层次建模 
一种用于振动能量获取的接口电路被引量:1
《西安电子科技大学学报》2015年第6期118-123,共6页王静敏 杨正 杨银堂 
国家自然科学基金资助项目(61234002,61322405,61306044,61376033);国家863计划资助项目(2012AA012302,2013AA014103)
提出了一种应用于振动能量获取的低压高效接口电路.采用输入电压作为接口电路的电源电压,当输入电压较低时,整个接口电路处于休眠状态,电路无功耗,从而提高了电路的能量转换效率.整流器中的比较器采用衬底输入,有效地降低了电路对电源...
关键词:振动能量获取 输入供电 CMOS有源整流器 有源二极管 亚阈值 衬底驱动 
Modeling of channel mismatch in time-interleaved SAR ADC
《Journal of Semiconductors》2015年第9期136-142,共7页李登全 张靓 朱樟明 杨银堂 
Project supported by the National Natural Science Foundation of China(Nos.61234002,61322405,61306044,61376033);the National High-Tech Program of China(No.2013AA014103)
In a time-interleaved analog-to-digital converter (TI ADC), several individual ADCs operate in parallel to achieve a higher sampling rate. Low power consumption as well as good linearity can be obtained by applying ...
关键词:analog-to-digital converter time interleaved successive approximation register channel mismatch 
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