云南高校图书馆联盟文献共享服务平台- OPAMP

OPAMP: 作品数：13被引量：7H指数：1; 导出分析报告; 相关领域：电子电信更多>>; 相关作者：杨银堂刘莉张翀杨海钢魏金宝更多>>; 相关机构：西安电子科技大学中国科学院电子学研究所清华大学贵州大学更多>>; 相关期刊：《西南交通大学学报》《西北大学学报（自然科学版）》《Circuits and Systems》《电子设计工程》更多>>; 相关基金：国家部委预研基金教育部科学技术研究重点项目国家自然科学基金国家高技术研究发展计划更多>>

基于恒流二极管(CRD)的运算放大器低功耗研究: 《电子设计工程》2015年第15期13-15,共3页邹序武丁召杨发顺刘娇; 贵州省电子元器件产学研基地(黔教合KY[2012]029号);半导体双向恒流二极管芯片产业化工艺攻关(黔科合GY字[2012]3030号); 基于CRD对741双极型通用集成运放进行改进研究,通过CRD替代双极型集成运算放大器(OPAMP)输入级及偏置电路中做为恒流源的双极型器件,并利用Multisim 10和Cadence进行设计与仿真。结果表明,当电源电压改变时,双极型运算放大器输入级电流...; 关键词：CRD 恒流源 OPAMP 低功耗

A Modified Approach for CMOS Auto-Zeroed Offset-Stabilized Opamp被引量：1: 《Circuits and Systems》2013年第2期193-201,共9页Abouzar Taghizadeh Ziaddin Daie Koozehkanani Jafar Sobhi; In this paper, a very low-offset continuous time amplifier has been presented. It has the fully differential structure and uses an Auto-zeroed offset stabilization technique. This structure consists of two phases in w...; 关键词：Auto-Zeroing CHOPPING Offset-Stabilization OPAMP

A 1.8 V low-power 14-bit 20 Msps ADC with 11.2 ENOB: 《Journal of Semiconductors》2012年第11期126-133,共8页蔡化; This paper describes the design of a 14-bit 20 Msps analog-to-digital converter（ADC）,implemented in 0.18μm CMOS technology,achieving 11.2 effective number of bits at Nyquist rate.An improved SHA-less structure and ...; 关键词：CMOS opamp-sharing low-power and background calibration

A novel compact low-power direct conversion receiver for mobile UHF RFID reader被引量：1: 《Science China(Information Sciences)》2012年第10期2226-2233,共8页LIU Shn WANG Xin'An SHEN JinPeng WANG Bo YE Tao HUANG Ru; supported by Hong Kong Innovation and Technology Fund (Grant No. ITP/034/08LP); A novel direct conversion receiver with low cost and low power is implemented in a 0.18 μm 1P6M standard CMOS process for a Mobile UHF RFID reader. A highly linear active mixer with low flicker noise and low noise ac...; 关键词：direct conversion receiver mobile UHF RFID reader low power DCOC active mixer four-input OPAMP

New Integrators and Differentiators Using a MMCC: 《Circuits and Systems》2012年第3期288-294,共7页Palaniandavar Venkateswaran Rabindranath Nandi Sagarika Das; Using the new building block Multiplication-Mode Current Conveyor (MMCC), some inverting/non-inverting type integrator and differentiator designs are presented, wherein the time constant (τ) is tuned electronically. ...; 关键词：Voltage-Controlled OSCILLATOR MULTIPLICATION Mode CURRENT CONVEYOR (MMCC) CURRENT Feedback OPAMP (CFA) Quadrature OSCILLATOR

A 10-bit 80-MS/s opamp-sharing pipelined ADC with a switch-embedded dual-input MDAC: 《Journal of Semiconductors》2011年第2期102-107,共6页尹睿廖友春张卫唐长文; Project supported by the National Natural Science Foundation of China(No.60876019);the National S&T Major Project of China(No. 2009ZX0131-002-003-02);the Shanghai Rising-Star Program(No.09QA1400300);the National Scientists and Engineers Service for Enterprise Program,China(No.2009GJC00046);the ASIC State-Key Laboratory Funding,China(No.09MS007); A 10-bit 80-MS/s opamp-sharing pipelined ADC is implemented in a 0.18μm CMOS. An opamp- sharing MDAC with a switch-embedded dual-input opamp is proposed to eliminate the non-resetting and successive-stage crosstalk p...; 关键词：pipelined ADC opamp-sharing low power switch-embedded dual-input MDAC

A 12-bit 40-MS/s SHA-less pipelined ADC using a front-end RC matching technique被引量：1: 《Journal of Semiconductors》2011年第1期85-89,共5页范明俊任俊彦舒光华过瑶李宁叶凡许俊; Project supported by the National High Technology Research and Development Program of China(No.2008AA010702); A12-Bit 40-MS/s pipelined analog-to-digital converter （ADC） incorporates a front-end RC constant matching technique and a set of front-end timing with different duty cycle that are beneficial for enhancing linearity...; 关键词：analog-to-digital converter opamp-sharing RC matching SHA-less LOW-POWER

A low power 12-bit 30 MSPS CMOS pipeline ADC with on-chip voltage reference buffer: 《Journal of Semiconductors》2011年第1期90-96,共7页陈奇辉秦亚杰陆波洪志良; Project supported by the National High Technology Research and Development Program of China(No.2009AA011607);the State Key Laboratory of China; A 12-bit 30 MSPS pipeline analog-to-digital converter （ADC） implemented in 0.13μm 1P8M CMOS technology is presented. Low power design with the front-end sample-and-hold amplifier removed is proposed. Except for the...; 关键词：analog-to-digital converter pipeline SHA removing OPAMP on-chip reference buffer

A 10-bit 50-MS/s subsampling pipelined ADC based on SMDAC and opamp sharing: 《Journal of Semiconductors》2010年第11期93-99,共7页陈利杰周玉梅卫宝跃; This paper describes a 10-bit,50-MS/s pipelined A/D converter（ADC） with proposed area- and power-efficient architecture.The conventional dedicated sample-hold-amplifier（SHA） is eliminated and the matching requirem...; 关键词：analog-to-digital converter PIPELINED SMDAC opamp-sharing

A 12 bit 100 MS/s pipelined analog to digital converter without calibration被引量：1: 《Journal of Semiconductors》2010年第11期100-104,共5页蔡小波李福乐张春王志华; A 1.8 V 12 bit 100 MS/s pipelined analog to digital converter（ADC） in a 0.18μm complementary metal-oxide semiconductor process is presented.The first stage adopts a 3.5 bit structure to relax the capacitor matching...; 关键词：pipelined ADC multi-bit OPAMP low power

OPAMP