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A single-ended 10-bit 200 kS/s 607 μ W SAR ADC with an auto-zeroing offset cancellation technique被引量：1
《Journal of Semiconductors》2015年第10期123-129,共7页顾蔚如 吴奕旻 叶凡 任俊彦 
Project supported by the National Science and Technology Support Program of China(No.2012BAI13B07);the National Science and Technology Major Project of China(No.2012ZX03001020-003)
Thispaperpresentsasingle-ended8-channel 10-bit200kS/s 607 #W synchronous successiveapproxi- mation register （SAR） analog-to-digital converter （ADC） using HLMC 55 nm low leakage （LL） CMOS technology with a 3.3 V/...
关键词：analog-to-digital converter CR hybrid DAC thermometer encoding auto-zero offset cancellation successive approximation register 
A low power 14 bit 51.2 kS/s double-sampling extended counting ADC with a class-AB OTA
《Journal of Semiconductors》2012年第9期108-114,共7页陈宏雷 伍冬 沈延钊 许军 
supported by the National High Technology Research and Development Program of China(No.2009AA042321)
A 14 bit 51.2 kS/s extended counting analog to digital converter （EC-ADC） is presented. Two techniques are utilized to reduce its power consumption. First, a double-sampling configuration based on a fully-floating b...
关键词：A/D converter CLASS-AB DOUBLE-SAMPLING low power 
A low power 12-bit 200-kS/s SAR ADC with a differential time domain comparator被引量：2
《Journal of Semiconductors》2011年第3期88-93,共6页杨思宇 张辉 付文汇 易婷 洪志良 
Project supported by the National Natural Science Foundation of China(No.60876021);the State Key Laboratory Project,China (No.MS20080203)
A low power 12-bit 200-kS/s SAR ADC is proposed.This features a differential time domain comparator whose offset is cancelled by using a charge pump and a phase frequency detector instead of the preamplifiers usually ...
关键词：successive approximation register A/D differential time domain comparator 
A 455 nW 220 fJ/conversion-step 12 bits 2 kS/s SAR ADC for portable biopotential acquisition systems被引量：1
《Journal of Semiconductors》2011年第1期79-84,共6页张辉 秦亚杰 杨思宇 洪志良 
Project supported by the State Key Laboratory of ASIC & System,China
An ultra-low power 12 bits 2 kS/s successive approximation register analog-to-digital converter （ADC） is presented. For power optimization, the voltage supply of the digital part is lowered, and the offset voltage o...
关键词：ADC SAR low power biopotential acquisition system 
A 10-bit 200-kS/s SAR ADC IP core for a touch screen SoC被引量：3
《Journal of Semiconductors》2010年第10期121-125,共5页佟星元 杨银堂 朱樟明 盛文芳 
Project supported by the National Natural Science Foundation of China(Nos.60725415,60971066,60676009,60776034,60803038);the National High-Tech Research and Development Program of China(Nos.2009AA01Z258,2009AA01Z260);the National Science & Technology Important Project of China(No.2009ZX01034-002-001-005)
Based on a 5 MSBs （most-significant-bits）-plus-5 LSBs （least-significant-bits） C-R hybrid D/A conver sion and low-offset pseudo-differential comparison approach, with capacitor array axially symmetric layout topol...
关键词：analog-to-digital converter SAR touch screen SoC CMOS integrated circuits low power 
An 8-bit 180-kS/s differential SAR ADC with a time-domain comparator and 7.97-ENOB被引量：1
《Journal of Semiconductors》2010年第9期118-122,共5页樊华 魏琦 Kobenge Sekedi Bomeh 殷秀梅 杨华中 
supported by the National Natural Science Foundation of China(No.60976032)
This paper presents a differential successive approximation register analog-to-digital converter（SAR ADC） with a novel time-domain comparator design for wireless sensor networks.The prototype chip has been implement...
关键词：successive approximation register time-domain comparator analog-to-digital converter 
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