以65nm双阱CMOS(Complementary Metal Oxide Semiconductor)工艺的SRAM(Static Random Access Memory)为研究对象,采用三维数值模拟方法,结合SRAM中晶体管布局和邻近SRAM的相对位置,对寄生双极晶体管效应致纳米SRAM内部节点电势多次翻...
This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator (SO1) technology node. It consists of two access transistors and two pull-down tran...