Supported by the National Natural Science Foundation of China(No. 90607009);the National High-Tech Research and Development (863) Program of China (No. 2008AA01Z107);the Na-tional Key Basic Research and Development (973) Program of China (No. 2007CB310701)
The network-on-chip (NoC) design methodology is an important trend for large system-on-chip designs to reduce the bandwidth and power constraints in traditional synchronous bus architectures. In the design of packet...
Supported by the National Natural Science Foundation of China (No.90607009);the National High-Tech Research and Development(863) Program(No.2008AA01Z107);the National Key Basic Research and Development(973) Program of China(No.2007CB310701)
A networks-on-chip (NoC) cost-effective design method was given based on the globallyasynchronous locally-synchronous (GALS) interconnect structure. In this method, the synchronous mode was used to transmit data a...